Company

Anonymous

Industry

Semiconductors

Location

Pulau Pinang

Company Description
Our Client, a NASDAQ-listed MNC, designs and manufactures semiconductor products and solutions. It enables its customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.

Process Engineering (Trim & Probe), Section Manager

Anonymous

Salary Budget: Please log into your account to check the details.
Job Type: Permanent
Location: Pulau Pinang
Special Requirements:

Rewards

Referral
CV Offer: USD210
Contact Offer: USD70
Placement
CV Offer: USD840
Contact Offer: USD210
Posting Date: 09-30-2020
Expiry Date: 06-30-2021

JOB DESCRIPTION

Summary

Our presence in the region gives the engineering team exposure to the center of excellence for Wafer Sort. This team has a major impact on product development, HVM enablement, and drives the revenue for years to come. There is a tremendous opportunity for career development and personal growth in this position. 

As a member of our Engineering team, you will be a critical part of realizing the ADI integrated manufacturing and development strategies, with responsibilities that include:

Responsibilities

  • Initiate problem-solving and trouble-shooting on Wafer Sort processes to reduce production-related problems and delays
  • Study on wafer sort procedures and work methods to improve output, quality, and cycle time (SOD).
  • Ensure that processes needed by engineering are established, implemented, and maintained.
  • Ensure the promotion of awareness of customer requirements.
  • Liaise with various internal departments (PE/TE, Maintenance, Planning, QA) to ensure all processes and procedures for wafer sort is documented and executed.
  • Study on and handling procedures improve manual handling methods, focusing on automotive-related products.
  • Study on wafers incoming and outgoing flow, to improve wafer staging on WIP.
  • To be involved in new project development.
  • To establish a system of wafer stages in wafer sort and focusing on low yield, special instruction and flow, re-probe, and others.
  • To generate OPL online update and line issues and ensure it’s communicated within all shifts of operators.
  • Controls process-related documents including manufacturing specifications, FMEA, Control Plans, and OCAP.

Requirements

  • BS or MS degree in EE or equivalent relevant experience. 
  • Minimum of 8 years of working experience in a high volume semiconductor environment.
  • Knowledge of CP, FMEA, OCAP, SPC, QMS, and 8D Problem-solving reporting method.
  • Knowledge of MiniTab, 6-Sigma, Green Belt, APQP, and DOE knowledge is an added advantage.
  • Able to work with all levels of people with good written English and communication skills.
  • Independent with initiative, good analytical skill, and able to work under minimal supervision.

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